The European Chips Act: What It Funds, What It Missed, and What Comes Next

The European Chips Act was passed with an ambition to double Europe's share of global semiconductor production to 20 percent by 2030. Three years in, the consensus assessment is that the target will not be met and the instrument was underpowered relative to the goal.

That is worth knowing, but it is not the useful part. The useful part is that the Chips Act created funding streams, pilot lines and a design infrastructure that are open now, and that on 3 June 2026 the Commission proposed its successor, the Chips Act 2.0.

What the Chips Act set up

The Act has three pillars.

Pillar 1, the Chips for Europe Initiative. The research, development and capacity-building arm. Up to €3.3 billion of EU money, split roughly evenly between Horizon Europe and the Digital Europe Programme, implemented through the Chips Joint Undertaking.

Pillar 2, security of supply. A framework for supporting first-of-a-kind manufacturing facilities in Europe, with a route to state aid approval that would otherwise be difficult. This is the pillar behind the large fab announcements.

Pillar 3, monitoring and crisis response. Supply chain monitoring, a coordination mechanism and emergency powers in a shortage.

For most companies, Pillar 1 is the one you can actually access.

What the Chips Joint Undertaking funds

The Chips JU is the implementing body and runs calls through the year. Recent call budgets have ranged from around €10 million to €50 million per topic.

Pilot lines

The most significant infrastructure investment. Five pilot lines are supported, covering process development, test and experimentation, and small-scale production. They are explicitly designed to bridge the gap between laboratory research and industrial fabrication.

The pilot lines cover advanced nodes, fully depleted silicon on insulator technology, heterogeneous integration and advanced packaging, and wide bandgap semiconductors.

Why this matters to companies that are not chipmakers: pilot lines provide access to fabrication capability that no SME could afford to build. If you are designing custom silicon, whether for AI acceleration, sensing, or specialised processing, access to a pilot line is the difference between a design that exists on paper and one you can test.

The design platform

A virtual design platform intended to give access to advanced design tools, IP libraries and cloud-based design environments, particularly for SMEs and startups who cannot afford commercial EDA licences at scale.

This is the most under-recognised part of the whole programme. Electronic design automation tooling is extraordinarily expensive and it is a genuine barrier to entry for chip startups. Subsidised access changes who can attempt a design.

Competence centres

A network across member states providing expertise, training and access to facilities. Similar in function to the European Digital Innovation Hubs but semiconductor-specific.

Skills

Vocational training, student programmes and university excellence hubs. Recent calls in 2026 covered exactly these topics, which reflects a growing recognition that the talent constraint is as binding as the capital constraint.

Who can actually use this

Chip designers and fabless companies. The clearest fit. Pilot line access, design platform access, and research calls.

Hardware companies specifying custom silicon. If your product roadmap involves an ASIC or a specialised accelerator, the design and pilot line infrastructure is relevant even if you are not a semiconductor company.

Equipment and materials suppliers. A large part of Europe's genuine semiconductor strength is in equipment and materials rather than fabrication. Calls cover this.

EDA and design tool developers. The design platform needs tools.

Research organisations and universities. Substantial parts of the calls are research-oriented.

Software companies, sometimes. Less obviously, but the software stack around chip design, verification, and hardware-software co-design is in scope, and it is an area where Europe has capability.

What went wrong with the first Act

Worth understanding, because it shapes what the Chips Act 2.0 proposal tries to fix.

The money was too small for the goal. €43 billion was the headline mobilisation figure, most of which was national and private rather than EU money, against competitors committing far more. Doubling market share against that arithmetic was never plausible.

It was largely a repackaging. A significant part of the funding was existing money relabelled rather than new commitment, which is a recurring criticism of European industrial policy announcements.

Leading-edge focus may have been the wrong bet. Europe's actual strengths are in equipment, materials, automotive and industrial chips, and research. Chasing leading-edge logic fabrication put money against the area of greatest disadvantage.

Approval timelines were slow. State aid processes and permitting took longer than the industry's investment cycle allows.

Demand did not follow. Several announced projects were delayed or scaled back as market conditions changed, most visibly in automotive semiconductors.

What the Chips Act 2.0 proposal would change

On 3 June 2026 the Commission adopted its proposal for a Chips Act 2.0 (COM(2026) 504, procedure 2026/0139(COD)) as part of its Technological Sovereignty Package. It would repeal Regulation (EU) 2023/1781 and replace it, keeping the three pillars. Read against the criticism above, the text does this:

The money is left to the budget talks. The Chips for Europe Initiative 2.0 would still be funded from Horizon Europe and the Digital Europe Programme, and from their successors after 2027. Whether genuinely new money arrives depends on the 2028 to 2034 budget, covered in our European Competitiveness Fund guide.

Broader scope, with one leading-edge bet kept. The first-of-a-kind rules would cover the whole value chain, from specialty materials, equipment and chip design to printed circuit boards, advanced packaging and assembly, and photonic integrated circuits join the initiative. At the same time, a strategic project on advanced manufacturing gets the highest priority: a first EU facility combining leading-edge node manufacturing with chiplet integration and 3D packaging, with pilot production envisaged for 2030 to 2033.

Faster permits. Strategic projects and first-of-a-kind facilities get a fast-track permit procedure, capped at 12 months from a complete application to a single one-stop shop.

Demand-side measures. Grand Challenges, a Demand Forum, Demand Accelerators and innovation procurement are meant to create early buyers for chips developed in the EU, and public buyers may weigh security of supply for chips going into critical infrastructure. The proposal links this to the AI compute build-out described in our InvestAI guide, which currently depends almost entirely on non-European accelerators.

It also adds a Semiconductor Region of Excellence label for regions with a semiconductor investment plan, and tighter supply chain monitoring with early-warning indicators. None of it is law yet. In Parliament the Industry, Research and Energy committee (ITRE) leads, with Oliver Schenk (EPP, Germany) appointed rapporteur on 31 August 2026, and in the Council the file is at working party level. That was the status on 10 October 2026.

How to engage practically

Check the Chips JU call calendar. Calls open through the year with deadlines typically a few months later. Recent cycles have had calls opening in the summer with autumn deadlines.

Approach the pilot lines directly if you need fabrication access. They have their own access processes distinct from the funding calls.

Look at the design platform if EDA licensing is a constraint. This is a practical cost reduction available now.

Find your national competence centre. As with EuroHPC, these exist to help organisations that are not already in the ecosystem.

Watch the IPCEI route if you are large. Important Projects of Common European Interest in microelectronics allow member state aid for cross-border projects. This is a national process, not a Brussels application.

An honest assessment

Semiconductor policy operates on timescales that make software policy look instant. Fabs take years to build and longer to become productive. Design cycles for complex chips run three to five years. Talent pipelines take a decade.

The realistic view is that the Chips Act will not achieve its headline target, will meaningfully strengthen specific parts of the European value chain, and will look better in fifteen years than it does now if the commitment is sustained. Whether it is sustained is a political question.

For a company deciding whether to engage, the strategic argument is largely irrelevant. What matters is whether pilot line access, design tool access or a funded research project is useful to you now. For chip designers and hardware companies, quite often it is, and the infrastructure is materially better than it was five years ago.

Where this fits

The full funding landscape is mapped in our EU technology funding guide. The programmes that fund the Chips for Europe Initiative are covered in our Horizon Europe and Digital Europe Programme guides, and the compute build-out that depends on semiconductors is in our InvestAI guide.

Products containing digital elements also fall under the Cyber Resilience Act, which is worth reading if you ship hardware into the EU.

Getting help

We build software for hardware and technology companies operating in Europe, including firmware, embedded systems, test and validation tooling, and the data infrastructure around manufacturing and device fleets.

If you have funded work that needs delivering, or a hardware product whose software side needs building or maintaining, write to office@c9group.dev. More about our work on the legacy system maintenance page and the EU market entry page.